The present invention relates to separably interconnecting power between a DC power supply and its load with minimal losses even with clocking transitions on the load current demands. More specifically, a pair of conductive plates sized for predetermined current capacity and shaped to conform to each other are separated by a thin insulator to thereby minimize both resistive and self-inductive losses.
In the field of electronics, and in particular in the field of high-performance computers, it is highly desirable to reduce the consumption of electrical power as much as possible. Toward this end, new generations of power supplies are designed to minimize loss, and new generations of processors and memory systems are designed to dissipate less power despite higher computational performance. An effective technique in reducing the power consumption P of electronics is to lower its operating voltage V. For CMOS circuits, P=CV2f, where C is the sum of all capacitances which are charged to voltage V or discharged from voltage V, at frequency f. As will be further explained, power is minimized by reducing V until any further reduction will stop the circuit from operating at frequency f. Yet, because P=VI, where I is current in amperes flowing through the electronics, reduced voltage V implies higher current I, despite reduction in power P. Thus, for such low-voltage, high-current electronics, a power connector must be capable of handling large current I. The current I must be delivered substantially at potential V from a supply terminal of the power supply to the electronics, and must be returned substantially at zero potential from the electronics to a return terminal of the power supply. The supply-terminal potential and the return-terminal potential may be referred to as “power” and “ground” respectively. Let ΔVs be the voltage drop that occurs as current I travels from the supply terminal to the electronics; let ΔVr be the voltage drop that occurs as current I travels from the electronics to the return terminal; and let ΔVo be other overhead voltage drop that occurs, such as in conductors other than the connector. Let Rs, Rr, and Ro be the resistances corresponding to the voltage dropS ΔVs, ΔVr and ΔVo respectively; that is,ΔVs=IRs;ΔVr=IRr;ΔVo=IRo.  (1)
A total overhead voltage drop ΔVtotal may therefore be defined asΔVtotal≡ΔVs+ΔVr+ΔVo=I(Rs+Rr+Ro)  (2)
For electronics such as a processor and memory, another common method of power reduction is to reduce, as processor workload changes, the processor's operating voltage V and/or a clock frequency f at which the processor operates. A popular technique is called dynamic voltage-frequency scaling (DVFS), in which both V and f are dropped proportionally when workload is reduced, and raised again when workload is increased.
Consequently, the current I from the power supply to the processor and memory varies strongly in time. This leads to voltage fluctuation at the processor and memory, because an inductive voltage drop ΔVL occurs across the power connector according to Faraday's Law,
                                          Δ            ⁢                                                  ⁢                          V              L                                =                      L            ⁢                          dI              dt                                      ,                            (        3        )            
where L is a self-inductance of the power connector and
  dI  dtis a change in current per unit time through the connector. Because a technique such as DVFS can produce large
      dI    dt    ,the self-inductance L of the power connector must be small, according to equation (3), to avoid large voltage fluctuations ΔVL.
Consequently, for low-voltage, high-current electronics, there is a need for a power connector that simultaneously achieves                (a) high current-carrying capacity,        (b) low connector resistance Rconn≡Rs+Rr, and        (c) low self-inductance Lconn.        
Some prior-art, high-current power connectors achieve (a) and (b), but fail to achieve (c). For example, a power connector comprising an array of pins, with each pin being either power or ground, has relatively high self-inductance. Other prior-art connectors, such as coaxial or stripline connectors, achieve (c) but fail to achieve (a): they are typically restricted to just a few amperes of current per contact.
Thus, the present inventors have recognized that it is highly desirable to find a connector structure that achieves (a), (b), and (c) simultaneously, and does so in a compact package for the purpose of reducing Ro. For example, a useful target set of specifications might be:I=100 A;Rconn≡Rs+Rr≦50μΩ;Lconn≦500 pH,  (4)where the inductance specification in (4) arises from a desire to achieve a dynamic voltage drop of at most
                    Δ        ⁢                                  ⁢                  V          L                    =              50        ⁡                  [          mV          ]                      ⁢                  with            dI      dt        =          100      ⁢                        A          μs                .            Additionally, it would be particularly useful to have the connectors to be able to mate and unmate multiple times, meaning that the connectors are selectively easily separable.